Demand Paging
Visualizer
Demand Paging is a memory management scheme where pages are loaded into physical memory only when they are referenced — not all at once. This visualizer lets you step through the process and observe page faults, frame allocation, and page replacement in real time.
Client-Side
No Backend Needed
Step-by-Step
Interactive Steps
FIFO / LRU / Optimal
Page Replacement
Interactive Tool
Page Replacement Simulator
Choose a preset, select your algorithm, then step through each memory access to observe page faults, hits, and frame allocation in real time.
Configure Simulation
Choose a preset or enter a custom reference string
Page Reference String
Number of Frames
Current: 3Page Replacement Algorithm
Choose a preset above (or type your own string), then click Run Simulation
Use the Prev / Play / Next controls to walk through each step
Concept Explanation
How Demand Paging Works
A reference guide to the core concepts behind demand paging and page fault handling.
What is Demand Paging?
Demand paging is a lazy loading strategy used by operating systems. Instead of loading all pages of a process into RAM at startup, only the pages that are actually needed (demanded) are loaded. This reduces initial load time and memory usage.
What Happens on a Page Fault?
When a process accesses a page not currently in physical memory, the hardware raises a page fault (trap). The OS then: (1) locates the page on disk, (2) finds a free frame or evicts a page using a replacement policy, (3) loads the page into the frame, (4) updates the page table, and (5) restarts the faulting instruction.
Valid-Invalid Bit
Each page table entry has a valid/invalid bit. If the bit is set to Valid (1), the page is in physical memory and accessible. If Invalid (0), the page is not in memory — any access triggers a page fault. The OS flips the bit to Valid after loading the page.
Page Replacement Algorithms
When all frames are full and a new page must be loaded, the OS must evict an existing page. Common strategies: FIFO (evict the oldest loaded page), LRU (evict the least recently used), Optimal (evict the page used farthest in the future — theoretically best).
Address Translation Diagram
When the Valid bit is 1, the physical address is formed directly. When 0, a page fault occurs and the OS loads the page from disk.
